XTX PCI Express Loss Budget Simulation
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The PCI Express Card Electromechanical Specification, Rev. 1.1 defines 3 different possible topologies in a PC System:
- PCI Express devices on the same system board
- PCI Express devices across one connector on a system with a system board and an add-in card
- PCI Express devices across two connectors on a system with a system board, a riser card, and an add-in card
When using an embedded CPU module concept such as XTX, the budget allocation for the high speed serial PCI Express buses must be reallocated to a new topology.
This simulation demonstrates a worst case implementation scenario in order to show that the topology set forth by the XTX specification, in conjunction with the use of the Hirose connectors, conforms to the PCI Express Specification, Revision 1.1.